Autonomous 0-DRC PCB Routing Foundry & Hardware MCP Server

io.github.calligraphysystems/vibe-hardware-mcpVersion 1.3.0

Autonomous 0-DRC PCB Routing, RF/DFM Pre-Flight & KiCad MCP Server (calligraphyeda.com).

Status

Responds1984 msNov 14, 2026, 14:47 UTCAnswered our handshake without sign-in.

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Last checked: Nov 14, 2026, 14:47 UTC
Latency: 1984 ms
Remotes responding: 1 of 1
Sign-in: No sign-in
Hosting: Hosted outside the EU (detected)
Registry data as of: Nov 14, 2026, 22:14 UTC

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Connect

Streamable HTTP

https://calligraphyeda.com/api/v1/mcpResponds1984 msNov 14, 2026, 14:47 UTC

No sign-in

Claude Code

claude mcp add --transport http vibe-hardware-mcp https://calligraphyeda.com/api/v1/mcp

Claude Desktop and claude.ai

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Settings > Connectors > Add custom connector
Name: vibe-hardware-mcp
Remote MCP server URL: https://calligraphyeda.com/api/v1/mcp

Cursor

{
  "mcpServers": {
    "vibe-hardware-mcp": {
      "url": "https://calligraphyeda.com/api/v1/mcp"
    }
  }
}

VS Code

code --add-mcp '{"name":"vibe-hardware-mcp","type":"http","url":"https://calligraphyeda.com/api/v1/mcp"}'

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Tools

16 tools

Tools of Autonomous 0-DRC PCB Routing Foundry & Hardware MCP Server
	Description		Read-only	Idempotent	Open world
`analyze_kicad_pcb`Parse and analyze a KiCad `.kicad_pcb` board locally (from `pcb_text` or `project_path`). Extracts copper layer stackup, board outline dimensions (mm), footprint count, SMD vs THT pad counts, fine-pitch (<=0.50mm) pad count, net count, routed trace/arc segment statistics, and via count.	Parse and analyze a KiCad `.kicad_pcb` board locally (from `pcb_text` or `project_path`). Extracts copper layer stackup, board outline dimensions (mm), footprint count, SMD vs THT pad counts, fine-pitch (<=0.50mm) pad count, net count, routed trace/arc segment statistics, and via count.	No	Yes	Yes	No
`analyze_specctra_dsn`Parse and analyze a Specctra `.dsn` PCB autorouter file locally (from `dsn_text` or `project_path`). Extracts units, resolution, signal/power copper layers, board boundary dimensions, component count, netlist summary, and design rule clearances/widths.	Parse and analyze a Specctra `.dsn` PCB autorouter file locally (from `dsn_text` or `project_path`). Extracts units, resolution, signal/power copper layers, board boundary dimensions, component count, netlist summary, and design rule clearances/widths.	No	Yes	Yes	No
`audit_pcb_dfm_rules`Run a local Design-for-Manufacturing (DFM) rule check on a `.kicad_pcb` or `.dsn` file against standard 2-layer or 4-layer fabrication limits (minimum trace width, clearance, via hole diameter, and annular ring width).	Run a local Design-for-Manufacturing (DFM) rule check on a `.kicad_pcb` or `.dsn` file against standard 2-layer or 4-layer fabrication limits (minimum trace width, clearance, via hole diameter, and annular ring width).	No	Yes	Yes	No
`audit_pre_route_rf_and_fab_stackup`Run the 4-Stage Pre-Route Vendor Stackup, 50-Ohm Microstrip vs. Coplanar Waveguide (CPWG) Impedance, 3*H1 Coplanar Ground-Pour Encroachment, Inner Reference-Plane Return Corridor, and Via-in-Paste (VIPPO) manufacturing gate on a `.kicad_pcb` before routing begins.	Run the 4-Stage Pre-Route Vendor Stackup, 50-Ohm Microstrip vs. Coplanar Waveguide (CPWG) Impedance, 3*H1 Coplanar Ground-Pour Encroachment, Inner Reference-Plane Return Corridor, and Via-in-Paste (VIPPO) manufacturing gate on a `.kicad_pcb` before routing begins.	No	Yes	Yes	No
`calculate_pcb_trace_impedance`Local PCB transmission-line impedance & IPC-2152 trace current calculator. Computes single-ended microstrip/stripline Z0 (Ohms), edge-coupled differential Zdiff (Ohms), propagation delay (ps/mm), and recommended trace width for a target impedance or DC current (Amps).	Local PCB transmission-line impedance & IPC-2152 trace current calculator. Computes single-ended microstrip/stripline Z0 (Ohms), edge-coupled differential Zdiff (Ohms), propagation delay (ps/mm), and recommended trace width for a target impedance or DC current (Amps).	No	Yes	Yes	No
`calligraphy_compile_board`Compile a PCB through Calligraphy EDA (3D HDI synthesis + Snowman teardrop pad fillets + Zero-VIPPO DFM surgery + 3D nodal G*V=I physics) and return 0-DRC telemetry, preview crops, a single clickable Stripe Checkout URL, and watch-only per-job USDT/USDC stablecoin payment instructions. Mode A (Zero-File Demo): Pass `sample_id='2l_rp2040'` (or `'2l_stickhub'`, `'4l_carrier'`). Mode B (User's Local Board over Remote HTTP): Read the user's local `.kicad_pcb`, `.dsn`, `.ato`, or `.tsx` file and pass its contents in `pcb_text` + `filename` (or `upload_b64` for `.PcbDoc`/`.zip`).	Compile a PCB through Calligraphy EDA (3D HDI synthesis + Snowman teardrop pad fillets + Zero-VIPPO DFM surgery + 3D nodal G*V=I physics) and return 0-DRC telemetry, preview crops, a single clickable Stripe Checkout URL, and watch-only per-job USDT/USDC stablecoin payment instructions. Mode A (Zero-File Demo): Pass `sample_id='2l_rp2040'` (or `'2l_stickhub'`, `'4l_carrier'`). Mode B (User's Local Board over Remote HTTP): Read the user's local `.kicad_pcb`, `.dsn`, `.ato`, or `.tsx` file and pass its contents in `pcb_text` + `filename` (or `upload_b64` for `.PcbDoc`/`.zip`).	No	No	No	Yes
`calligraphy_create_coinbase_checkout`Create a 1-Click Coinbase Pay / Coinbase Onchain Payment Protocol checkout session (and x402 AI-agent payment URL) settling in USDC on Base (chain_id=8453) with automatic DEX token conversion and zero gas-dust sweeping.	Create a 1-Click Coinbase Pay / Coinbase Onchain Payment Protocol checkout session (and x402 AI-agent payment URL) settling in USDC on Base (chain_id=8453) with automatic DEX token conversion and zero gas-dust sweeping.	No	No	No	Yes
`calligraphy_download_fab_bundle`Download the unlocked routed .kicad_pcb and turnkey JLCPCB/PCBWay .zip bundle (Gerbers, Excellon drills, IPC-D-356, BOM, CPL, and 3D HTML5 viewer) once paid via Stripe Checkout, autonomous USDT/USDC stablecoin verification, or active 30-day board license.	Download the unlocked routed .kicad_pcb and turnkey JLCPCB/PCBWay .zip bundle (Gerbers, Excellon drills, IPC-D-356, BOM, CPL, and 3D HTML5 viewer) once paid via Stripe Checkout, autonomous USDT/USDC stablecoin verification, or active 30-day board license.	No	Yes	Yes	Yes
`calligraphy_get_job_status`Query the compilation and payment status of a Calligraphy EDA job (`job_id`). When `status` is `COMPLETED_AWAITING_PAYMENT`, returns `stablecoin_payment_instructions` with the job's unique watch-only `deposit_address` (`0x...`) for autonomous USDT/USDC checkout.	Query the compilation and payment status of a Calligraphy EDA job (`job_id`). When `status` is `COMPLETED_AWAITING_PAYMENT`, returns `stablecoin_payment_instructions` with the job's unique watch-only `deposit_address` (`0x...`) for autonomous USDT/USDC checkout.	No	Yes	Yes	Yes
`calligraphy_list_gallery_boards`List the 55 / 55 conquered open-source PCB benchmark boards (20/20 PCBench Tier T Frontier + 13/13 Tier D Torture + 22/22 Multi-ECAD — 100.0% routed, 0 native KiCad 9 copper DRC violations) and available 1-click sample demo IDs ('2l_rp2040', '2l_stickhub', '4l_carrier').	List the 55 / 55 conquered open-source PCB benchmark boards (20/20 PCBench Tier T Frontier + 13/13 Tier D Torture + 22/22 Multi-ECAD — 100.0% routed, 0 native KiCad 9 copper DRC violations) and available 1-click sample demo IDs ('2l_rp2040', '2l_stickhub', '4l_carrier').	No	Yes	Yes	Yes
`calligraphy_lookup_b2b_invoice`Look up a Calligraphy EDA job and generate a B2B Tax Invoice & Chain-of-Custody Certificate with custom PO number and company name.	Look up a Calligraphy EDA job and generate a B2B Tax Invoice & Chain-of-Custody Certificate with custom PO number and company name.	No	Yes	Yes	Yes
`calligraphy_preflight_audit`Inspect a .kicad_pcb file or .zip project bundle (including atopile/tscircuit/Altium/Allegro builds), verify outline/pad readiness, and return a deterministic 3-Lever NRE-anchored price quote ($149 vibe_micro for <=150 pads up to $1,495+ route_3d). Mode A (Zero-File Demo): Pass `sample_id='2l_rp2040'` (or `'2l_stickhub'`, `'4l_carrier'`). Mode B (User's Local Board over Remote HTTP): Read the user's local `.kicad_pcb`, `.dsn`, `.ato`, or `.tsx` file and pass its contents in `pcb_text` + `filename` (or `upload_b64` for `.PcbDoc`/`.zip`).	Inspect a .kicad_pcb file or .zip project bundle (including atopile/tscircuit/Altium/Allegro builds), verify outline/pad readiness, and return a deterministic 3-Lever NRE-anchored price quote ($149 vibe_micro for <=150 pads up to $1,495+ route_3d). Mode A (Zero-File Demo): Pass `sample_id='2l_rp2040'` (or `'2l_stickhub'`, `'4l_carrier'`). Mode B (User's Local Board over Remote HTTP): Read the user's local `.kicad_pcb`, `.dsn`, `.ato`, or `.tsx` file and pass its contents in `pcb_text` + `filename` (or `upload_b64` for `.PcbDoc`/`.zip`).	No	Yes	Yes	Yes
`calligraphy_purge_job_vault`Immediately shred all enclave CAD and synthesis artifacts for job_id and return a cryptographically signed CertificateOfDestruction (zero_retention_verified=True).	Immediately shred all enclave CAD and synthesis artifacts for job_id and return a cryptographically signed CertificateOfDestruction (zero_retention_verified=True).	Yes	No	Yes	Yes
`calligraphy_request_ip_whitelist`Submit a Support Whitelist Request for an engineering team, corporate NAT IP, or PCB layout agency that needs higher daily compilation write limits (e.g. 25–100 compiles/day).	Submit a Support Whitelist Request for an engineering team, corporate NAT IP, or PCB layout agency that needs higher daily compilation write limits (e.g. 25–100 compiles/day).	No	No	No	Yes
`calligraphy_route_pcb`Alias for calligraphy_compile_board: synthesize and route a PCB through Calligraphy EDA (0 opens, 0 DRC) and return Stripe, Coinbase Pay (x402), and watch-only USDT/USDC payment instructions. Mode A (Zero-File Demo): Pass `sample_id='2l_rp2040'` (or `'2l_stickhub'`, `'4l_carrier'`). Mode B (User's Local Board over Remote HTTP): Read the user's local `.kicad_pcb`, `.dsn`, `.ato`, or `.tsx` file and pass its contents in `pcb_text` + `filename` (or `upload_b64` for `.PcbDoc`/`.zip`).	Alias for calligraphy_compile_board: synthesize and route a PCB through Calligraphy EDA (0 opens, 0 DRC) and return Stripe, Coinbase Pay (x402), and watch-only USDT/USDC payment instructions. Mode A (Zero-File Demo): Pass `sample_id='2l_rp2040'` (or `'2l_stickhub'`, `'4l_carrier'`). Mode B (User's Local Board over Remote HTTP): Read the user's local `.kicad_pcb`, `.dsn`, `.ato`, or `.tsx` file and pass its contents in `pcb_text` + `filename` (or `upload_b64` for `.PcbDoc`/`.zip`).	No	No	No	Yes
`calligraphy_verify_stablecoin_payment`Submit an on-chain `USDT` or `USDC` transaction hash (`tx_hash`) sent to the job's unique watch-only `deposit_address` on `base`, `arbitrum`, `polygon`, or `ethereum` to receive a private HMAC-SHA256 payment receipt (`receipt_hmac_sha256`) and immediately unlock `calligraphy_download_fab_bundle` with zero human browser intervention.	Submit an on-chain `USDT` or `USDC` transaction hash (`tx_hash`) sent to the job's unique watch-only `deposit_address` on `base`, `arbitrum`, `polygon`, or `ethereum` to receive a private HMAC-SHA256 payment receipt (`receipt_hmac_sha256`) and immediately unlock `calligraphy_download_fab_bundle` with zero human browser intervention.	No	No	Yes	Yes

Details

Registry status: Active
Published: Nov 12, 2026
Updated: Nov 12, 2026
Website: https://calligraphyeda.com/⁠ (opens in a new tab)
Repository: https://github.com/calligraphysystems/vibe-hardware-mcp⁠ (opens in a new tab)
Categories (suggested): Invoicing and accounting CRM Finance and paymentsSuggested categories are assigned automatically from the registry text and may be wrong. Verified operators can correct them.
GDPR: Not declared

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